Johns Hopkins University 3 credits Electrical & Computer Engineering
This course introduces both the state-of-the-art computing hardware designs for AI and hardware-aware AI algorithm co-optimization, with a focus on improving AI system computing and energy efficiency. The first section will mainly cover the efficient computing hardware designs for AI, including, but not limited to, application specific integrated circuit (ASIC) chip design for AI, in-memory computing (IMC) chip design for AI, GPU optimization for AI, etc. The second section will discuss the hardware-aware AI algorithm optimization, including but not limited to weight quantization, structured pruning, unstructured pruning, sparse processing, knowledge distillation, low rank approximation, memory-efficient on-device continual learning, etc. The course consists of instructor lectures, homework, final project, project demo. One example project is to develop energy efficient AI system on jetson nano-GPU system.
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